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Contact:
Todd Foshee
Aldec, Inc.
(702) 990-4400 ext. 250
toddf@aldec.com


FOR IMMEDIATE RELEASE


Aldec Preps for User Group Conference

Design Verification and RTL Acceleration Focus of Conference


Henderson Nevada, August 13, 2001-- Aldec, Inc., a leading supplier of HDL design entry and verification software for application specific integrated circuits (ASICs) and field programmable gate arrays (FPGAs) announced today the 1st Annual Aldec Users' Group Conference will be held in Las Vegas November 4-6, 2001. The conference will be the first of its kind for the Henderson, Nevada-based firm and will provide a wealth of information and hands-on training for its users.

"Our customer base continues to grow and we have been asked to provide a forum for our users to come together and learn how they can maximize our tools," stated Todd Foshee, Aldec's Corporate Marketing Manager.

Conference Highlights
The 2-day conference will include seminars on how to maximize design verification and management, new methodology for supporting the Embedded System designs via hardware/software co-verification and an emphasis on RTL hardware acceleration to decrease simulation run times. Technical Labs and Focus Groups are intended to provide in-depth understand of Aldec's current and future product offerings.

"This is not only a great opportunity for our current users to come together and share their successes with others, it also provides them an opportunity to gain valuable insight into how they might be able to increase their productivity and decrease design cycles at their company," stated Foshee.

Cost of the Conference
The cost of the conference is $750 and includes two nights hotel accommodation at the Las Vegas Hilton, meals, and entertainment. An Early Bird Discount for registering prior to September 30 is available. For more information on the Aldec Users' Group Conference or to register, please visit www.aldec.com.

About Aldec
Aldec, Inc. has offered PC and Workstation-based design entry and simulation solutions to FPGA and ASIC designers for more than 16 years. During this time, Aldec has signed several OEM agreements with IC vendors, such as Xilinx, Inc. (NASDAQ:XLNX) and Cypress Semiconductor Corp. (NYSE:CY). Aldec, headquartered in Henderson, Nevada, produces a universal suite of Windows, Linux and UNIX-based EDA tools that allow design engineers to implement their designs using several different design entry methods (Schematic Capture, State Machine, Block Diagram, VHDL, Verilog or ABEL). Aldec incorporates patented simulation technology and several design entry tools to provide a complete design entry and simulation solution. Founded in 1984, the company continues to evolve in the EDA market as the fastest growing verification company in the world. Additional information about Aldec is available at http://www.aldec.com.


Copyright 2001, Internet Business Systems, Inc.
1-888-44-WEB-44 --- marketing@ibsystems.com